Today, Intel and other manufacturers stamp out microchips from dinner plate–size silicon wafers. By creating ever more detailed stamps, they cram chips with increasing numbers of the tiny switches known as transistors. But researchers believe that once silicon circuits slim down to 10 nanometers, which the semiconductor industry predicts will occur after 2020, they will start leaking electricity profusely. Already this year Intel and IBM announced that they would begin adding new materials to counteract leaky currents in their upcoming 45-nanometer transistors.
The question is what material comes next. Many have preened for the role. Graphene, like the carbon nanotube, meets the first requirement: it is a snappy conductor of electricity—better than many semiconductors. As in the nanotube, each carbon atom has three neighbors and an unused electron that is free to skitter around, hence conduction.
But nanotubes grow in dense thickets that are hard to separate and place with precision. To create circuits from them, researchers must attach relatively bulky wires that spoil much of their conductivity. “Carbon nanotube integrated electronics was hyped from the start,” says nanotube-cum-graphene researcher Walter de Heer of the Georgia Institute of Technology. “Graphene is different.”
With graphene, researchers envision stamping out circuits from large wafers, much as they already do with silicon. But perfecting those wafers has proved challenging. Another long-term “if,” Geim says, is whether graphene can be carved into small pieces that actually work. But researchers are just learning. “Strictly two-dimensional materials didn’t exist until 2004,” he says.